[fpc-devel] Error building xtensa rtl

Florian Klämpfl florian at freepascal.org
Mon Mar 30 22:21:12 CEST 2020

Am 30.03.20 um 22:07 schrieb Christo Crause via fpc-devel:
> On Sun, Mar 29, 2020 at 11:00 PM Florian Klämpfl <florian at freepascal.org 
> <mailto:florian at freepascal.org>> wrote:
>     Am 29.03.20 um 22:46 schrieb Christo Crause via fpc-devel:
>      > It seems that a different instruction sequence should be used for
>     sign
>      > extension for the lx106 subarch.
>     Ok, I see. Let me first integrate everything done so far in trunk, then
>     we can continue with the details :)
> I've noticed GCC uses the SLLI + SRAI instructions to perform sign 
> extension on ESP8266.
> Since different CPUs can support different subsets of the Xtensa 
> instructions do you think a finalizecode type function can be used as a 
> post code generation step to map unsupported instructions to alternative 
> sequences?

In this case just cgcpu can be adapted to generate the right code. This 
results normally in better code.

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