[fpc-devel] Code generator issue for Cortex-M0 chips in trunk

[Michael Ring]

Will do so ....

Michael

Am 08.08.14 um 13:57 schrieb Sven Barth:
>
> Am 08.08.2014 10:29 schrieb "Michael Ring" <mail at michael-ring.org 
> <mailto:mail at michael-ring.org>>:
> >
> > There seems to be a bug in the codegenerator for armv6m thumb code.
> >
> > tst r0,#-2147483648
> >
> > is not valid armv6m assembler code, documentation says that tst only 
> can use registers:
> >
> > TST Rn, Rm
> >
> > where:
> > Rn Is the register holding the first operand. Rm The register to 
> test against.
> >
> > Restrictions
> >
> > In these instructions, Rn and Rm must only specify R0-R7.
> >
> >
> > Could somebody please fix?
>
> Maybe best report as a bug so that it isn't forgotten.
>
> Regards,
> Sven
>
>
>
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