[fpc-devel] Some Opcodes missing in internal assembler for mips32r2

Michael Ring mail at michael-ring.org
Wed May 29 19:44:21 CEST 2013

This is looking good now on first view, all statements seem to pass 
through now.

The only thing not working is the register error in mfc0 (and friends) 

Now I will wade through some more code to find out why my nice param 
-CpMIPS32R2 is ignored by assembler, it still defaults to MIPS2:

Target OS: Embedded
Compiling pic32mx1xxfxxxb.pp
Assembling pic32mx1xxfxxxb
pic32mx1xxfxxxb.s: Assembler messages:
pic32mx1xxfxxxb.s:37: Error: Illegal operands `mfc0 $t0,$t4,1'
pic32mx1xxfxxxb.s:38: Error: Opcode not supported on this processor: 
mips2 (mips2) `ext $t0,$t0,19,1'
pic32mx1xxfxxxb.s:49: Error: Opcode not supported on this processor: 
mips2 (mips2) `ext $t2,$t1,26,4'
pic32mx1xxfxxxb.s:51: Error: Opcode not supported on this processor: 
mips2 (mips2) `ins $t1,$t2,6,4'

Thank you for your help!


Am 29.05.13 18:13, schrieb Sergei Gorelkin:
> 29.05.2013 2:08, Sergei Gorelkin пишет:
>> 29.05.2013 1:26, Michael Ring пишет:
>>> I did the changes, parts of the opcodes now work fine, I think I 
>>> have found the problem with the li
>>> + and + mfc0 op-codes, if last parameter is 0 then the asm statement 
>>> is generated wrong:
>>> This works:
>>>      and    $a0,$a0,1
>>> this does not work:
>>>      and    $a0,$a0,0
>>> result is:
>>> pic32mx1xxfxxxb.s:107: Error: absolute expression required `and 
>>> $a0,$a0,'
>> So it is the value of operand that matters. I'll try to look at it, 
>> probably a bug in the parsing
>> part, because the output part doesn't have anything suspicious.
> Fixed in r24630. The parsing part is buggy as hell (it interprets 
> numbers as references rather than as constants), but the output part 
> wasn't correct either at outputting such references.
> Regards,
> Sergei
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