[fpc-pascal] LLVM Backend Support

[Jonas Maebe]

Jonas Maebe wrote on Fri, 19 Aug 2016:

> On 19/08/16 10:51, Sven Barth wrote:
>> Why is it that 32-bit targets would be a bit tricky to implement?
>
> It's because our code generators don't have full generic support for  
> 32 bit architectures with 64 bit integer "registers". It's possible  
> to implement support for something like that (the JVM code generator  
> does it), but then you have to take care of it in various code  
> generator units. We have separate defines for cpuXXbitalu and  
> cpuXXbitaddr, but they don't handle everything everywhere in the  
> generic code yet.

Another, more important, issue is that the LLVM-based compiler also  
includes the regular code generator for the targeted architecture (to  
generate entry and exit code for pure assembler routines). This means  
you have both a 64 bit ALU and a 32 bit ALU code generator in the same  
binary, which may need different constant values (e.g. OS_INT should  
be OS_32 for one and OS_64 for the other -- so that may have change  
from a global constant into a class field).


Jonas