[fpc-devel] register calling convention for Apple M1 ?
lazarus at mfriebe.de
Wed Feb 16 21:28:59 CET 2022
On 16/02/2022 21:21, Dmitry Boyarintsev via fpc-devel wrote:
> On Wed, Feb 16, 2022 at 3:17 PM Martin Frb via fpc-devel
> <fpc-devel at lists.freepascal.org> wrote:
> Anything similar on M1?
> should it be ARM64 calling convention?
Possible. I have a bit of disassembly, a callstack, and a listing of
register values at that call. They suggest its x0 x1 and x2
I just hoped for some definite confirmation by someone who knows for sure.
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