[fpc-devel] A difficult optimisation

J. Gareth Moreton gareth at moreton-family.com
Mon Oct 19 18:02:32 CEST 2020

Hi everyone,

So I've been studying the disassembler dumps of the RTL for some new 
possible optimisations, and I've found a potential one that's a little 
trickier than normal:

# Peephole Optimization: MovxMov2Movx
     movslq    %eax,%rbx
     jmp    .Lj83
     .p2align 4,,10
     .p2align 3
     movq    %rdi,%rdx
     movq    %rsi,%rcx
# Peephole Optimization: MovxMov2Movx
     movslq    %eax,%rbx
     movq    %rbx,%rax

Here, %rbx is not used afterwards, and the premise is that for the two 
"movslq %eax,%rbx" calls, you can change them to "movslq %eax,%rax" and 
the "movq %rbx,%rax" can be removed completely.  It also works if the 
destination register in the final instruction is not %rax, but a third 
register (thus the sign-extension operations become "movslq %eax,%reg3").

The hard part though is tracking it, since the optimiser will have to 
potentially evaluate many different branches and if there's even just a 
single branch where %rbx (in this case) is set through some other means 
or the final destination register is in use while %rbx is being 
manipulated, the optimisation must not be made.

This optimisation would require at least two passes and probably only 
something to do under -O4.  The difficult part is storing information in 
between the passes to indicate which mov/s/z instructions can get 
modified.  The answer I've come up with so far is to add some extra 
information into the tai_label object that gets updated whenever a 
"mov/s/z; jmp" pair is found to that label, and if the relevant register 
is immediately loaded elsewhere then deallocated.

Does anyone have any alternative approaches that would be better? 
Otherwise, would it be okay that I add additional functionality to 
tai_label for x86?  I'm trying to avoid adding new 'hint' entries into 
the AsmList, since this will slow down overall compilation and is asking 
for trouble.

Gareth aka. Kit

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