[fpc-devel] SSE/AVX instruction encodings

[avx512 at t-online.de]

Hi,

look at the function "MemRefInfo(aAsmop: TAsmOp)" in "compiler/x86/aasmcpu.pas".


Torsten



-----Original-Nachricht-----
Betreff: [fpc-devel] SSE/AVX instruction encodings
Datum: 2020-10-01T13:57:05+0200
Von: "J. Gareth Moreton via fpc-devel" <fpc-devel at lists.freepascal.org>
An: "FPC developers' list" <fpc-devel at lists.freepascal.org>

Hi everyone,

I've decided to take on https://bugs.freepascal.org/view.php?id=37785 - 
I've noticed that the compiler isn't too good at working out the sizes 
of SSE and AVX instructions.  If you look at 
Tx86Instruction.SetInstructionOpsize in compiler/x86/rax86.pas, it 
checks for individual problematic instructions rather than any logical 
flags.  I feel this isn't viable in the long-term (i.e. I really don't 
want to continually add exceptional instructions) and has the code smell 
of something being fundamentally wrong or incomplete with how 
instruction sizes and encodings are determined.

I'm looking to see if there's a way I can detect the correct size 
logically given the flags.  I figure I'll need to learn a few things 
about AVX512 as well so I don't mess anything up (I've noticed a few 
AVX512 flags to indicate if scalars rather than vectors are being used, 
and wondering if they can be incorporated into the older SSE and AVX 
instructions in x86ins.dat.

Long story short, I'm going to experiment a bit to see if I can develop 
an algorithm that works and is correct.

Gareth aka. Kit


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