[fpc-devel] Proposal for implementing named address space support

[Jonas Maebe]

On 31/12/2020 20:32, Christo Crause via fpc-devel wrote:

> For example I do not know how to generate the equivalent to the
> following user assembler code:
>   lds r0, EECR
> where EECR is defined as follows in a different unit:
> var EECR: byte absolute $1F;
> 
> The following line illustrates what I'm attempting to do:
>   list.concat(taicpu.op_reg_ref(A_LDS,tmpreg,tmpref));
> where tempref should reference the EECR symbol in another unit.
> 
> How do I build such a reference in the code generator so that the
> reference can resolve to the appropriate address?

While possible, the code generator is the wrong abstraction level for
this. Can't you generate a load node for that variable instead? What
triggers this code generation?


Jonas