[fpc-devel] AVX 512 - Can't compile vaddps zmm1, zmm2, zmm3

J. Gareth Moreton gareth at moreton-family.com
Mon Jun 18 01:13:30 CEST 2018


The x I can't remember off-hand, but I 
think is a placeholder for variable input. 
You might have to experiment with viewing 
the disassembly of a function such as MOV 
or ADD, or look at the source code of the 
utility that creates the inc files. As for 
the numbers, they are octal (historical 
reasons, I think mostly because there were 
only 8 general-purpose registers to deal 
with).

The only time I personally modified this 
file was some time go to reorder the MOV 
commands in an attempt to get the 
assembler to use a shorter byte sequence 
for small negative numbers being stored in 
64-bit locations.

Gareth aka. Kit

On Sun 17/06/18 22:35 , Joao Schuler 
jp at schulers.com sent:
> Thank you Kit.
> [VADDPS](Ch_Wop3, Ch_Rop2, 
Ch_Rop1)xmmreg,xmmreg,xmmrm             
>     3623701x5875120               
> AVX,SANDYBRIDGEymmreg,ymmreg,ymmrm      
           
> 3623643701x5875120            
AVX,SANDYBRIDGE
> In regards to the opcode, what is the 
base (doesn't look hexa) for these
> numbers? Example: 
> 362364370  - are these 16 bits numbers 
(too big for bytes)?
> 
> x58 - is this 58 hexa?
> As an example,  
> 
> vaddps ymm0 ymm1 ymm3I was expecting: 
> 
> C5F458C3
> On Mon, Jun 18, 2018 at 5:26 AM, J. 
Gareth Moreton  wrote:
> The file you want is 
compiler/x86/x86ins.dat, which contains 
the syntax
> information for all of the x86-64 
assembler commands.
> A tool that's run by "make" will then 
generate a number of .inc files that
> are then referenced by the source code.
> Gareth aka. Kit
> 
> On Sun 17/06/18 20:59 , Joao Schuler 
jp at schulers.com sent:
> I can give a try to support vaddps and 
other instructions I need the most
> in AVX512. Where is the code (what file) 
for the above please?
> On Sun, Jun 17, 2018 at 6:30 PM, Florian 
Klämpfl  wrote:
> Am 17.06.2018 um 06:37 schrieb Joao 
Schuler:
> Hi,
> I started testing the AVX512 branch:
> 
https://svn.freepascal.org/svn/fpc/branche
s/tg74/avx512/ [1]
> 
> This is the code:
> 
> {$ASMMODE intel}
> asm
>      vaddps  zmm1, zmm2, zmm3
> end;
> 
> The error message is: invalid 
combination of opcode and operands.
> 
> The assembly code looks correct to me:
> Should I submit a bug report?
> 
> Only if you submit a patch with it :)
> 
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