[fpc-devel] Code generator issue for Cortex-M0 chips in trunk

[Michael Ring]

There seems to be a bug in the codegenerator for armv6m thumb code.

tst r0,#-2147483648

is not valid armv6m assembler code, documentation says that tst only can 
use registers:

TST Rn, Rm

where:
Rn Is the register holding the first operand. Rm The register to test 
against.

Cortex-M0+ Devices Generic User Guide

Restrictions

In these instructions, Rn and Rm must only specify R0-R7.

Cortex-M0+ Devices Generic User Guide
Could somebody please fix?

Thank you,

Michael

/Users/ring/devel/fpc-arm/compiler/ppcrossarm -Cparmv6m @rtl.cfg -Ur 
-Tembedded -Parm -XParm-none-eabi- -Xr -Ur -Xs -O2 -n -Fi../inc 
-Fi../arm -FE. -FU/Users/ring/devel/fpc-arm/rtl/units/arm-embedded -darm 
-dRELEASE -O- -gw2 -Us -Sg system.pp
/Users/ring/devel/fpc-arm/rtl/units/arm-embedded/system.s: Assembler 
messages:
/Users/ring/devel/fpc-arm/rtl/units/arm-embedded/system.s:342: Error: 
unshifted register required -- `tst r0,#-2147483648'
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