[fpc-devel] register allocator seems to be using S20 for two things at the same time (related to armhf porting work)
plugwash at p10link.net
Tue Mar 20 01:37:28 CET 2012
> The algorithm used is called "iterated register coalescing", an
> advanced form of graph colouting and was designed by Andrew W. Appel.
> He describes in detail in his book "Modern Compiler Implementation in C".
Thanks, I think i'll grab a copy from the uni library tomorrow.
> Basically the registers are put into "worklists"
How does it decice which worklist to put a register in? do registers
move between the worklists?
> , and then 4 procedures:
> * simplify -> takes registers out of the graph that can safely be
> * coalesce -> tries to coalesce registers together to reduce pressure
> * freeze -> selects registers that have a chance to be coalesced and
> should therefore not be spilled yet
> * spill -> selects a register that should move to memory.
> These procedures are called iteratively until the worklists are empty.
> Then the graph is coloured.
Is this process run seperately for each type of register (int/float/mm)?
P.S. I tried putting debug writelns in the code that generates spills
and it doesn't seem to be being called for my current testcase :/ (this
wasn't the only testcase that failed but I feel it's best to approach
them one at a time).
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