[fpc-devel] Stellaris Update

[Geoffrey Barton]

On 16 Aug 2011, at 04:39, John Clymer wrote:

> So, after some work, I have a compiler working for the LM3S8962 board (a successful Blinking LED :-)  )
> 
> However, as I was going through some of the various datasheets, I see that all the Stellaris controllers have similar memory maps.  That is:
> 
> A) Each type of device has a specific spot in the memory map to sit at.
> B) If a device has less or no device of a given type, that memory map is "Reserved"
> C) The SRAM and FLASH memories always start at the same address
> 
> As such, I'm leaning towards:
> 
> {$FLASH_START xxxxx}
> {$FLASH_SIZE xxxxx }
> {$SRAM_START xxxxx }
> {$SRAM_SIZE xxxxx }
> 
> By doing this, only 1 config will work for all stellaris parts (as was originally laid out in the cpuinfo file.)
> 
> I'm also looking to do a survey of all STM32 devices to see if a similar situation exists.  I think, for all Cortex M3 devices of a particular manufacturer, a similar scheme can be used.  The M3 specs make requirements that limit the "flexibility" to come up with oddball memory layouts.

It is clear from the ARM cortex m3 tech ref manual that all derivatives (all manufacturers) have internal code starting at $00000000 and ram starting at $20000000, so only two parameters are required for all possible cortex m3 parts, written either as ram top, flash top, or ram size, flash size.

Geoffrey
> 
> John Clymer
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