[fpc-devel] Russian locale information not compatible with FPClocale variables

[Marco van de Voort]

> One option is each assembly instruction in the function to be actually 
> executed in a separated thread. This is one of the proposals of Intel. Of 
> course the compiler will have to packs the instructions the same way the 
> compilers for DSP chips, Transmeta Crusoe, and Itanium processors do that. 
> They group the assembly instructions in groups to be executed as a single 
> parallel instruction. Intel proposes the same model, except the instructions 
> will be sent to separated cores. This way your function will be executed N 
> times faster.

Hmm, isn't that about execution units not cores?