[fpc-devel] Problems building xtensa-freertos RTL in trunk
Michael Ring
mail at michael-ring.org
Mon Apr 6 20:54:53 CEST 2020
I was able to compile my first hello world for esp32, however I had to
patch a few files so that compiling works for 4.0 / 4.1 Branch of esp-idf
Florian, can you please have a look at the patches and apply them if
they are OK?
diff --git a/compiler/systems/t_freertos.pas
b/compiler/systems/t_freertos.pas
index 3698f28dc1..a0788751ec 100644
--- a/compiler/systems/t_freertos.pas
+++ b/compiler/systems/t_freertos.pas
@@ -77,7 +77,7 @@ begin
if target_info.system=system_xtensa_freertos then
ExeCmd[1]:='ld -g '+platform_select+' $OPT $DYNLINK $STATIC
$GCSECTIONS $STRIP $MAP -L. -o $EXE -T $RES '+
'-u call_user_start_cpu0 -u ld_include_panic_highint_hdl -u
esp_app_desc -u vfs_include_syscalls_impl -u
pthread_include_pthread_impl -u pthread_include_pthread_cond_impl -u
pthread_include_pthread_local_storage_impl -u newlib_include_locks_impl
-u newlib_include_heap_impl -u newlib_include_syscalls_impl -u
newlib_include_pthread_impl -u app_main -u uxTopUsedPriority '+
- '-L $IDF_PATH/components/esp_rom/esp32/ld -T
esp32.rom.newlib-funcs-time.ld '+
+ '-L $IDF_PATH/components/esp_rom/esp32/ld '+
'-T esp32.rom.ld -T esp32.rom.libgcc.ld -T
esp32.rom.newlib-data.ld -T esp32.rom.syscalls.ld -T
esp32.rom.newlib-funcs.ld '+
'-L . -T esp32_out.ld -T esp32.project.ld '+
'-L $IDF_PATH/components/esp32/ld -T esp32.peripherals.ld'
@@ -1523,10 +1523,10 @@ begin
{ generate linker maps for esp32 }
binstr:='$IDF_PATH/tools/ldgen/ldgen.py';
cmdstr:='--config sdkconfig --fragments
$IDF_PATH/components/xtensa/linker.lf $IDF_PATH/components/soc/linker.lf
$IDF_PATH/components/esp_event/linker.lf '+
- '$IDF_PATH/components/spi_flash/linker.lf
$IDF_PATH/components/esp_wifi/linker.lf
$IDF_PATH/components/lwip/linker.lf $IDF_PATH/components/log/linker.lf '+
+ '$IDF_PATH/components/spi_flash/linker.lf
$IDF_PATH/components/esp_wifi/linker.lf
$IDF_PATH/components/lwip/linker.lf '+
'$IDF_PATH/components/heap/linker.lf
$IDF_PATH/components/esp_ringbuf/linker.lf
$IDF_PATH/components/espcoredump/linker.lf
$IDF_PATH/components/esp32/linker.lf '+
'$IDF_PATH/components/esp32/ld/esp32_fragments.lf
$IDF_PATH/components/freertos/linker.lf
$IDF_PATH/components/newlib/newlib.lf '+
- '$IDF_PATH/components/app_trace/linker.lf
$IDF_PATH/components/esp_gdbstub/linker.lf '+
+ '$IDF_PATH/components/esp_gdbstub/linker.lf '+
'--input $IDF_PATH/components/esp32/ld/esp32.project.ld.in
--output ./esp32.project.ld --kconfig $IDF_PATH/Kconfig --env-file
config.env '+
'--libraries-file ldgen_libraries --objdump
xtensa-esp32-elf-objdump';
Replace(binstr,'$IDF_PATH',maybequoted(GetEnvironmentVariable('IDF_PATH')));
diff --git a/rtl/freertos/xtensa/esp32.pp b/rtl/freertos/xtensa/esp32.pp
index 1bc9d3bcf9..e7070e082b 100644
--- a/rtl/freertos/xtensa/esp32.pp
+++ b/rtl/freertos/xtensa/esp32.pp
@@ -22,10 +22,10 @@ unit esp32;
{$linklib spi_flash,static}
{$linklib app_update,static}
{$linklib xtensa,static}
-{$linklib esp_timer,static}
+//{$linklib esp_timer,static}
{$linklib bootloader_support,static}
{$linklib pthread,static}
-{$linklib soc_esp32,static}
+//{$linklib soc_esp32,static}
{$linklib hal,static}
{$linklib c,static}
{$linklib esp_event,static}
Am 05.04.20 um 14:50 schrieb Michael Ring via fpc-devel:
> Just to be sure, from your Path settings it looks like you are using
> esp-idf from the release/v4.0 Branch, correct?
>
> Michael
>
> Am 04.04.20 um 19:44 schrieb Florian Klämpfl:
>> Am 04.04.20 um 16:06 schrieb Christo Crause via fpc-devel:
>>> I'm keen to test the xtensa-freertos target, but it seems there are
>>> a couple of patches missing from trunk.
>>>
>>> It is possible to build an xtensa cross compiler, but the make files
>>> doesn't know the xtensa-freertos target. To get the make files in
>>> rtl updated, one needs to rebuild fpcmake, edit rtl/MakeFile.fpc
>>> and add "dirs_freertos=freertos" to the target list, then run
>>> fpcmake. At this point the the following make command proceeds up to
>>> sysutils:
>>> make rtl FPC=~/fpc/3.3.1/compiler/ppcrossxtensa CPU_TARGET=xtensa
>>> OS_TARGET=freertos BINUTILSPREFIX=xtensa-esp32-elf-
>>>
>>> where the following errors crop up:
>>> syssbh.inc(43,41) Error: Identifier not found "Double"
>>> syssbh.inc(49,41) Error: Identifier not found "Single" etc.
>>>
>>> I trust someone (Florian...) has a working build?
>>>
>>
>> I sent Michael recently some instructions but I am not sure if they
>> are still working. As Pierre got qemu-xtensa working I am pushing the
>> linux port so we can test more easily the compiler.
>>
>> - install esp-idf and execute
>> source ~/eps/esp-idf/export.sh
>> to get the pathes and environment set (namely tools path and
>> $IDF_PATH are needed)
>> - use the lazarus project fpc/compiler/ppcxtens.lpt to build an
>> xtensa compiler
>> - build the rtl (breaks currently at sysutils, doesn't matter):
>> cd rtl/freertos
>> make FPC=../../compiler/xtensa/pp OS_TARGET=freertos "OPT=-Cplx6
>> -Cawindowed -XPxtensa-esp32-elf-" clean all
>> - build the example hello world program from the esp-idf, copy all
>> generated .a into e.g. ~/xtensa-esp32-elf-libs
>> - create somewhere a hello world program, compile it with
>> fpc/compiler/xtensa/pp -Fu../rtl/units/xtensa-freertos/ -Tfreertos
>> -Cawindowed -XPxtensa-esp32-elf- -al -O3 -Wpesp32
>> -Fl~/xtensa-esp32-elf-libs
>> -Fl$HOME/.espressif/tools/xtensa-esp32-elf/esp-2019r2-8.2.0/xtensa-esp32-elf/xtensa-esp32-elf/lib/
>> hello
>> - get partition-table.bin and bootloader.bin from the hello_world
>> example compiled above and copy them into the same dir as the
>> compiled hello.bin
>> - flash with
>> esptool.py -p /dev/ttyUSB0 -b 460800 --before default_reset --after
>> hard_reset --chip esp32 write_flash --flash_mode dio --flash_size
>> detect --flash_freq 40m 0x1000 bootloader.bin 0x8000
>> partition-table.bin 0x10000 hello.bin
>> - monitor the output with:
>> idf_monitor.py --port /dev/ttyUSB0 hello.elf
>>
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