[fpc-pascal] Memory alignment with FPC

[Mark Morgan Lloyd]

Marco van de Voort wrote:
> In our previous episode, Nico Erfurth said:
>> x86 can handle unaligned access, but most implementations (I think
>> current atoms and via nano are an exception) will suffer a rather high
>> performance penalty.
> 
> I thought most modern x86's only had a penalty when an unaligned
> access crossed a cacheline boundery ? (32 bytes now, 64 bytes on Haswell)

In any event, I run FPC and Lazarus on SPARC which is susceptible to 
misalignment and am not currently aware of any problems.

-- 
Mark Morgan Lloyd
markMLl .AT. telemetry.co .DOT. uk

[Opinions above are the author's, not those of his employers or colleagues]