[fpc-pascal] getting started with threads

[Jonas Maebe]

On 19 Sep 2009, at 10:36, Micha Nelissen wrote:

> Jonas Maebe wrote:
>> on x86 too). Atomic operations are not memory barriers by  
>> themselves, and the fact that you perform an atomic operation does  
>> not mean that afterwards all cpu's will immediately see this new  
>> value.
>
> Explain? Isn't the point of an atomic update that it doesn't matter  
> whether the other CPU has seen the value yet? Or are we talking  
> about different values?

Yes, sorry for being unclear. One problem is that unless all of the  
data to which the queue elements point is also only loaded/stored  
using atomic operations, it is possible that the popping cpu will see  
different values than those intended the pushing cpu (because their  
caches may not yet have been syncronised). So at least for the pop you  
need a full memory barrier. There are probably more issues. Here's a  
page with several different atomic queue implementations for ppc, and  
all of them contain some form of barrier: http://www.cocoadev.com/index.pl?AtomicSQ


Jonas