[fpc-pascal] Free Pascal Support for ARM Architecture

Prince Riley wmarketing3 at gmail.com
Mon Dec 8 22:00:16 CET 2008

Sorry, I think you are mistaken.. I did ask which ARM Architecture and if
you follow the thread back you'll see I even gave examples of what the
assembler options were for ARM

Here is the text of that post ....

Thanks for that reply ... and yes I meant IA32

A few additional points if I may ..

When you say the FP supports the ARM architecture my specific question is
how does FP 'inform' *the GNU assembler back end of which ARM architecture
is intended ..*.

The following is just a snippet from the GNU Assembler manual showing the
ARM processor option codes ...

This option speci es the target processor. The assembler will issue an error
message if an
attempt is made to assemble an instruction which will not execute on the
target processor. The
following processor names are recognized: arm1, arm2, arm250, arm3, arm6,
arm60, arm600,
arm610, arm620, arm7, arm7m, arm7d, arm7dm, arm7di, arm7dmi, arm70, arm700,
arm700i, arm710, arm710t, arm720, arm720t, arm740t, arm710c, arm7100,
arm7500fe, arm7t, arm7tdmi, arm8, arm810, strongarm, strongarm1,
strongarm1100, strongarm1110, arm9, arm920, arm920t, arm922t, arm940t,
arm9tdmi, arm9e, arm946e-r0, arm946e, arm966e-r0, arm966e, arm10t, arm10e,
arm1020, arm1020t, arm1020e, ep9312 (ARM920 with Cirrus Maverick
i80200 (Intel XScale processor) iwmmxt (Intel(r) XScale processor with
Wireless MMX(tm)
technology coprocessor) and xscale. The special name all may be used to
allow the
assembler to accept instructions valid for any ARM processor.
In addition to the basic instruction set, the assembler can be told to
accept various extension
mnemonics that extend the processor using the co-processor instruction
space. For example,
-mcpu=arm920+maverick is equivalent to specifying -mcpu=ep9312. The
following extensions
are currently supported: +maverick +iwmmxt and +xscale.

*I need to be clear on how FP specifies one of these option and how the
'assemble' directive within the FP syntax is implemented to use ARM register
and assembler sematics/syntax which the GNU Assembler assumes will be set by
the language 'front end'*


if you look at this list you'll see that ARM3,6, and 7 are among the

So back then, as I have up to now, I asked which assembler code option (
meaning -- which ARM architecture --) did FP support.

On Mon, Dec 8, 2008 at 2:17 PM, Jonas Maebe <jonas.maebe at elis.ugent.be>wrote:

> On 08 Dec 2008, at 20:43, Prince Riley wrote:
>  What I keep asking here and not getting a precise answer about is what
>> specific ARM opcodes does the FP support What is its default ARM
>> architecture is the opcode spec based on?
> The problem was that you never asked for which ARM architecture FPC
> generates assembler code, but only which ARM sub-architecture parameter FPC
> passes to the GNU assembler. Those are two completely separate questions
> (and unrelated in this case).
> By default, FPC generates ARMv4 architecture code. You can also ask for
> ARMv5 and ARMv6 code (using the -Cp command line option, see "ppcrossarm -i"
> for the possible options).
> In practice, the only difference at this time is that the prefetch()
> statement is not translated into assembler code unless you target ARMv6
> (because earlier ARM cpus do not have a prefect assembler instruction).
>  To be clear ARM5 and ARM7 aren't
>> variants, they are RISC family processors to be sure, but they are
>> 'different.'
> They are variants of the same processor family (just like the i386 and the
> Core2Duo are variants of the same processor family). The fact that they are
> variants does not mean that they support exactly the same instruction set.
> Jonas
> _______________________________________________
> fpc-pascal maillist  -  fpc-pascal at lists.freepascal.org
> http://lists.freepascal.org/mailman/listinfo/fpc-pascal
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