[fpc-devel] fpc bug with M1

[Jonas Maebe]

On 30/12/2021 21:28, Martin Frb via fpc-devel wrote:
> Well the issue is, that at some time it needs to be extended, as the 
> full expression is
> 
>   Result := Result + (pn8^ shr 7) and ((not pn8^) shr 6);
> 
> Result is either 64 or 32 depending on architecture.
> pn8 is pint8
> 
> On intel
> - only the byte is loaded. "Not" applies to the byte only.
> - Then on intel the value is sign extended, even though an (logical) 
> "shr 6" could be done on the byte.
> - For the addition, sign extension is needed.
> 
> That means that due to the early sign extension, the bytes 8..31 (or 
> 8..64) before the shift (or 2..25 after) might be set to 1.
> 
> Since shr is not arithmetic, and does not keep/fill the "sign bit", I do 
> not see why a sign extension is needed at that point. (But that is 
> another issue)

It's because, as mentioned earlier, in Pascal virtually all operations 
are performed using the native integer type. Converting a signed byte to 
the native integer type requires a sign extension to keep the value equal.


Jonas