[fpc-devel] FPC and Z80

[Marco van de Voort]

Op 2020-04-27 om 21:24 schreef Florian Klämpfl:
> Well, for 6502 working 16-bit ptr indirect via volatile zp memory 
> locations needs to be implemented anyway :-)
>>
>> Does that CPU have no hardware stack at all, or only limited (128/256 
>> bytes or so?)
>
> It has a full stack but too little registers to use it efficiently for 
> local variables: it has 3 8 bit registers pair plus accumulator (so 7 
> 8 bit registers), 

Then you need a parallel software stack for parameters and local vars, 
and keep the hw stack for return addresses only.

But like with the c=64 without 16-bit regs you probably need some form 
of indirect addressing via zeropage base pointers to access that stack( 
if>8bit).  IIRC the 6502 had very little free ZPs, but a lot more if you 
can reuse the locations used by the interpreter (e.g. backup/restore if 
you want to be able to return to basic)

> two of them can be used as pairs for indirect addressing, so this 
> makes life very hard

That is already more than the 6502 has.  Afaik the instruction pointer 
is the only 16-bit one. But if an basic interpreter can do it, so can a 
compiled program?