[fpc-devel] Is there a way to make Register Allocation inside of Interrupt Service Routines more efficient when using inline-assembler?

Michael Ring mail at michael-ring.org
Wed Aug 24 13:15:32 CEST 2016

The PIC32MX chips have one or two shadow sets, on the systems with only 
one shadow set it is hardcoded to the highest priority interrupt (7)

I have implemented detection of shadow register use, in this case the 
registers do not get pushed on stack, that saves quite a few cpu-cycles 
in that case.

But in a microcontroller systems you usually have several peripherals 
running at different interrupt levels, not so important tasks run on 
lower priorities so register saving is still an issue.

Until now I did not look into floating point at all, as the small 
PIC32MX1/2 devices have no floating point processor I never used the 
real datatype anyway but when code for hardware floating point is always 
generated then this will of course create issues at runtime when 
somebody uses that datatype. But that's a story for another rainy day.

Right now it is sufficient for me to know that it may be most likely a 
bug or an unimplemented feature (like sergej said), I was fearing that I 
did something wrong when defining the target.

Perhaps in a future far far away I will look what it needs to also 
support PIC32MM and PIC32MZ but as they use MicroAdaptiv instruction set 
(something like thumb mode on arm) I will need to learn more on the 
inner workings of fpc so please bare with me when I continue asking 
questions on the inner working of fpc, I am slowly understanding more 
and more how things work but I still do not see the big picture....


Am 24.08.16 um 10:09 schrieb Florian Klämpfl:
> Am 13.08.2016 um 18:57 schrieb Michael Ring:
>> Hi!
>> I am trying to bring interrupt handling routine size down (and speed up) for mipsel-embedded target.
>> I need to use inline assembler routines like this one
>> procedure TSystemCore.setCoreTimerComp(value : longWord); assembler; nostackframe;
>> asm
>>    mtc0 $a1,$11,0
>> end ['a1'];
>> inside of the interrupt handler, but as soon as I include the call to this procedure the number of
>> registers that get saved explodes. When I only need to modify some peripheral I usually get away
>> with only $v0 and $v1 registers getting saved, but with asm routine included all registers get saved.
>> Same is true if I put the asm block directly inside of the interrupt handler.
>> As you can see I have added the used registers list for this procedure so my expectation was that
>> only the register declared does get added to the list of used registers.
>> Is this a bug on mips platform or is there in general no way to define the list of used registers
>> for an assembler routine so that register allocation works more efficient?
>> Or is there another way for me to trick freepascal in not saving all registers?
> Did you read the suggestion from Michael Schnell? Does the MIPS you use have a shadow register set?
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