[fpc-devel] Is there a way to make Register Allocation inside of Interrupt Service Routines more efficient when using inline-assembler?

[Michael Ring]

I tried a small test program with -CfSoft or -CfMIPS2 or -CfMIPS3, 
result is always the same, I did a grep on the *.s files.

I see allocations of float registers within the procedures, when they 
are called only cpu registers are marked as allocated.

Michael


Output:

test.s:    # Register v0 allocated
test.s:    # Register f2 allocated
test.s:    # Register v0 released
test.s:    # Register v0 allocated
test.s:    # Register v0 released
test.s:    # Register f0 allocated
test.s:    # Register f0 released
test.s:    # Register f2 released
test.s:    # Register v0 allocated
test.s:    # Register v1 allocated
test.s:    # Register v0,v1 released
test.s:    # Register a0 allocated
test.s:    # Register a0 released
test.s:    # Register v0 allocated
test.s:    # Register v0 released
test.s:    # Register a0 allocated
test.s:    # Register a0 released
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra allocated
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra released
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra allocated
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra released
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra allocated
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra released
test.s:    # Register v0 allocated
test.s:    # Register v0 released
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra allocated
test.s:    # Register 
at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra released
test1.s:           # Register a0 allocated
test1.s:           # Register a0 released
test1.s:           # Register v0 allocated
test1.s:           # Register f2 allocated
test1.s:           # Register v0 released
test1.s:           # Register v0 allocated
test1.s:           # Register v0 released
test1.s:           # Register f0 allocated
test1.s:           # Register f0 released
test1.s:           # Register f2 released

Am 22.08.16 um 21:52 schrieb Florian Klämpfl:
> Am 21.08.2016 um 13:32 schrieb Michael Ring:
>> Was getting high hopes for a moment...
>>
>> @Charlie: the last point you mention, this optimization is already there. As long as I do not call a
>> procedure and directly include inline assembler in the interrupt routine all is fine, only really
>> used registers are in the list of registers that need to get saved and the interrupt handlers gets
>> quite lean & efficient.
>>
>> @Sergej: I just started wondering on usage of fp registers, when I call a routine that uses floating
>> point I see that the fp registers are not marked as reserved by the compiler, what do you think?
>>
>> The procedure below (test) uses $f0 and $f2 but they are not marked as allocated:
>>
>>          # Register at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra allocated
>>          jal     P$TEST_$$_TEST
>>          nop
>>          # Register at,v0,v1,a0,a1,a2,a3,t0,t1,t2,t3,t4,t5,t6,t7,t8,t9,ra released
>>
>> could this be a bug? (I have also modified tcpuparamanager.get_volatile_registers_fp to return [] so
>> i'd expect to see $f0..$f19 pushed to stack but I see nothing)
> Soft float activated?
>
> _______________________________________________
> fpc-devel maillist  -  fpc-devel at lists.freepascal.org
> http://lists.freepascal.org/cgi-bin/mailman/listinfo/fpc-devel