[fpc-devel] Problem with bitpacked records and STM32F107 Controller

Jonas Maebe jonas.maebe at elis.ugent.be
Wed Dec 11 10:34:46 CET 2013

On 11 Dec 2013, at 08:43, Michael Ring wrote:

> The strb command seems to be the problem, documentation from STM states:
> Each I/O port bit is freely programmable, however the I/O port registers have to be accessed as 32-bit words (half-word or byte accesses are not allowed).
> So, is there some way to make the bitset operations word-aligned?

No. In C, you can control the access size by using "int ODR0:1;" instead of "char ODR0:1;", but there is no equivalent in Pascal. This functionality was not introduced with direct hardware access in mind, but for compatibility with the way it's implemented in Mac Pascal compilers and GPC/GCC (the last one with "__attribute__((__packed__))", which is what GPC implicitly uses).

> Are there any good reasons for not doing so?

Bitpacked records are considered to be byte-aligned by the compiler. That means that if we would use 16bit or 32bit loads stores, they would actually be split up in multiple byte stores on ARM, which is definitely not what you would want here. The alignment of such records could change if we did have a way to specify the access size of individual elements, but in past discussions nobody ever came up with a nice syntax for this. I'm personally also not interested in working on this.


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