[fpc-devel] fpc AVR32
mcatudal at comcast.net
Thu Oct 25 02:36:30 CEST 2012
Le 24/10/2012 15:22, Jeppe Græsdal Johansen a écrit :
> PC relative word loads aren't aligned automatically, and due to the variable instruction length such an instruction might end up on a halfword boundary. I have no clue how to fix it in a simple way. LDDPC has a very small allowable offset
I am not sure why you are saying that the words are not aligned automatically. I have been working with the at32uc3c devices for more than 2 years and never had issues of alignment with gcc or IAR.
Could it be that you use an internal buggy linker? Can't you tell the compiler to use avr32-ld instead of the internal linker? The only way I would see that you would get alignment problems is if you force fixed addresses for each functions. Normally the
linker will padd with a byte if the code is not on a word boundary. If you use a proper linker file you can force the linker to align data on the correct word boundary.
If you need to access data indirectly all you have to do is make sure that you do not access bytes but 16 bit, 32 bit or 64 bit variables.
I will keep you posted on my progress.
A couple of questions for other fpc developers. How do you define data to be in flash instead of RAM? With IAR C Compiler I just have to define the data as const and it is automatically put into flash instead of RAM.
How do I signal the fpc compiler to use the proper linker file when using an external linker? How do I impose an address for the stack and heap? In the uc3c devices there is 64k or regular ram and 4k of high speed ram which with IAR C Compiler I assign to
the stack and heap. I wouldn't want it fixed with the compiler in case I decide to have a different address area and use that 4k for some other reason.
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