[fpc-devel] volatile variables

[Vinzent Höfler]

On Tue, 28 Jun 2011 18:11:29 +0200, Hans-Peter Diettrich  
<DrDiettrich1 at aol.com> wrote:

> I think that you should give at least an example, where instruction  
> reordering makes a difference. Neither a compiler nor a processor is  
> allowed to reorder instructions in a way, that breaks the def/use  
> (produce/consume...) chain (see SSA - Single Static Assignment).

Well, yes. But multiple processors are actually allowed to do that.

That's why the double-lock idiom for Singletons is bound to break on
multi-cores.


Vinzent.