[fpc-devel] Extended type

Jonas Maebe jonas.maebe at elis.ugent.be
Tue Apr 19 11:49:16 CEST 2011

On 19 Apr 2011, at 11:43, Alexander Klenin wrote:

> 2011/4/19 Nikolai Zhubr <n-a-zhubr at yandex.ru>:
>> Now, with the
>> introduction of 64-bit processors IIRC AMD took care of this  
>> problem by
>> providing some means to execute floating-point operations without  
>> the need
>> for traditional FPU register space, thus allowing to avoid the need  
>> to
>> save/restore FPU state. IIRC these are some _new_ opcodes,  
>> unavailable on
>> earlier CPUs.
> Very interesting -- can you provide further detail on this?
> I could not find anything relevant neither in vol.1 ch.6 nor vol.5  
> ch.2 of
> AMD's APM -- is there something I overlooked?

There are no really new instructions for floating point. However,  
x86-64 mandates at least SSE2 (while x86 does not), which in turn  
supports 64 bit floating point math.


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