[fpc-devel] MM_MaskInvalidOp in mxcsr
markus.beth at zkrd.de
Fri Sep 3 12:05:23 CEST 2010
Is there a reason why MM_MaskInvalidOp is not set in mxcsr in
I have a 3rd party application that depends on InvalidOp to be masked
out. I want to extend this application with a FPC library. But the
initialization code of the library (SysInitFPU) unmasks the InvalidOp
I now call "SetSSECSR(GetSSECSR or $0080);" in the initialization
section of my main unit to mask out the InvalidOp exception again.
But I wonder if this could break something (in rtl or internal FPC
functions). I fear it is unmasked on purpose in SysInitFPU because
according to the Intel documentation (Intel Software Developers Manual
2A) "The default MXCSR value at reset is 1F80H."
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