cpstrnew branch (was Re: [fpc-devel] Freepascal 2.4.0rc1 released)
micha at neli.hopto.org
Thu Nov 12 12:26:23 CET 2009
Micha Nelissen wrote:
> Intel: system programming guide vol 3 section 8.1.1 says byte, word,
> doubleword, quadword (since Pentium) are all atomic if they are
> naturally aligned. (word = 16 bits) 184.108.40.206 notes that LOCK is also best
> to be used on naturally aligned boundaries for 8/16/32/64 bit accesses
> for best performance.
Hmm, note: it seems that intel's "movq" to move quadword (64bit)
register (or load/store data) is usable only for XMM/MMX registers, not
the regular registers? This would mean there is no atomic load/store for
the native sized regular registers (rax, rcx, etc) in x86_64? Is this right?
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