[fpc-devel] LLVM Backend?

[Michael Schnell]

Florian Klaempfl wrote:

> I'am sure, somebody
> will write you a backend for the desired processor.

Yep, a team of three: I, me, and myself.

As this processor, a load/store RISC with 32 non-dedicated 32 Bit
registers, is very similar to MIPS and thus a bit similar to ARM (only
that MIPS-alike it does not have a status register) I suppose I should
use the well-tested ARM code generator and modify it appropriately. Once
I am done, someone should be able to add some definitions to have the
thing create MIPS-32 code.

I just need to find the spare time (and at that time, I do hope for
appropriate tips from this list to get me started,)

-Michael