[fpc-devel] Freepascal in microcontrollers
Vinzent Hoefler
JeLlyFish.software at gmx.net
Wed Feb 27 12:06:08 CET 2008
On Wednesday 27 February 2008 11:45, Florian Klaempfl wrote:
> Vinzent Hoefler schrieb:
> > On Wednesday 27 February 2008 11:16, Micha Nelissen wrote:
> >> Vinzent Hoefler wrote:
> > If I mean to set the write buffer water mark of the SDRAM
> > controller
> >
> > register, I'd rather write:
> > |SDRAM_Buffer_Control.WB_Watermark := Sixteen;
> >
> > instead of
> >
> > |SDRAMBufferControl := (SDRAMBufferControl and not
> > | WB_WATERMARK_MASK) or WB_WATER_MARK_16;
>
> I don't see the point: pascal and also fpc know bitpacked records?
Well, TP didn't, and until now I found no real documentation on it (it
sure wasn't mentioned in *my* copy of the programmer's manual). If it's
similar to C-records then it's unusable anyway, as there are no
guarantees. Not about endianess, not about padding. And what about
volatile and/or atomic semantics?
Well, too many question at once. I boil it down to this one: How else do
you write it? The original layout declaration:
| for SDRAM_Buffer_Control use
| record
| WB at 0 range 0 .. 0;
| WB_Flush at 0 range 1 .. 1;
| WB_Watermark at 0 range 2 .. 3;
| Read_Ahead at 0 range 4 .. 4;
| -- bits [5:7] are reserved
| end record;
It get's especially tricky, because in many cases the bit patterns don't
fit the numbers:
| type RAS_CAS_Delay is range 2 .. 4;
| for RAS_CAS_Delay'Size use 2;
or
| type CAS_Latency is range 2 .. 3;
| for CAS_Latency'Size use 1;
I don't really want to write
|SDRAM_Timing_Control.CAS_Latency := 1; // Where 0 is 2 and 1 is 3.
Well, not that big a problem, because once the patterns get
nonconsecutive, you'd need enums either way. ;)
Vinzent.
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