[fpc-devel] BlackFin

Johann Glaser Johann.Glaser at gmx.at
Fri Apr 13 21:37:31 CEST 2007


Hi!
> > regarding the ASM code is very strange if you compare it to
> > the code of 80x86,  PPC or ARM.
> 
> As far as I have seen the BlackFin has two cores: an arm like risc core
> and a dsp.

The BlackFin and other Analog Devices DSPs have an uncommon assembler
syntax. Contrary to well-known mnemonic style like
  add   eax,ecx
they use an algebraic syntax like
  r2 = r1 + r3, r4 = dm(i0,m1);  /* addition and memory access */
  r3 = r2 * r4, r1 = r2 + r4;    /* multiplication and addition */

Regarding the implementation for a compiler this is no principal
problem, because the compiler has an internal representation of what it
wants to do, and this can be equally expressed in (=transformed to)
mnemonic and algebraic syntax.

A totally different topic is the inherent parallel processing of a DSP.
Usually they can utilize several processing units (+, *) and memories
within a single cycle (e.g. see above). Instruction ordering and
interleaving to utilize parallelism is tedious to do by hand and I think
also challenging for a compiler.

Bye
  Hansi





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