[fpc-devel] Successful implementation of inline support forpure assembler routines on x86

[Marco van de Voort]

Op 3/17/2019 om 6:57 PM schreef Florian Klämpfl:
>
>> Something along these lines is absolutely sorely lacking in FPC 
>> currently, don't let anyone tell you otherwise.
>
> How is it better than intrinsics support (similiar to gcc/icc etc.)?
>
Intrinsics are common, and prepared for you by compiler devels.

  Inline assembler blocks are something you use as a programmer as soon 
as you reuse a block a lot. An example in the embedded world, e.g. as an 
interrupt prologue or epilogue, things like prologues for SPI operations 
(lowering/raising CS and enabling/disabling interrupts, padded with 
appropriate nops if needed if the slave is slower than the master).

Example PIC32MK/MZ (=MIPS) which has quite some different interrupt 
prologues depending on what features are used (shadow registers and the 
like).

These are now gcc inline macros.