[fpc-devel] STM32F407 fun
Michael Ring
mail at michael-ring.org
Sat Mar 19 12:48:20 CET 2016
Re-reading your initial mail I am kind of wondering what you actually did ?
When using -WpSTM32F407VG you will automagially use stm32f407xx.pp unit
which is the correct one for your chip and also stack should be correct
as ram size is set to 128MB.
How/why did you use STM32F429 unit for the chip?
Michael
Am 19.03.16 um 12:36 schrieb Michael Ring:
> Are you sure about RAM? I checked in cpuinfo, it is set to 128MB, this
> matches what is written in the user manual, (Page 70)
>
> http://www.st.com/st-web-ui/static/active/en/resource/technical/document/datasheet/DM00037051.pdf
>
>
> or are the last 16k for some special use? Could not find a hint while
> quickly searching through the manual.
>
> Michael
>
>
> Am 19.03.16 um 04:47 schrieb Andrew Haines:
>> Hi,
>>
>> I've been trying to get a very simple program to run on my discovery
>> board that I've had for a while(STM32F407VG). Using st-util with gdb
>> I managed to make some progress.
>>
>> I've been using the code in fpc for STM32F429 since it's pretty
>> similar. My first problem was that the stackpointer was too high. The
>> STM32F407VG has 64kb less memory than the STM32F429. I added a define
>> in compiler/arm/cpuinfo.pas with the correct info and had it use the
>> STM32F429 unit. That fixed my first problem.
>>
>> The next/current problem is in CommonInit in system.
>> SynchronizeTimeoutEvent:=RtlEventCreate;
>>
>> RtlEventCreate has:
>> result:=currenttm.rtleventcreate();
>> This produces the assembly:
>> 0x8007e08 <SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT> push {lr}
>> (gdb) i registers pc
>> pc 0x8007e0a 0x8007e0a
>> <SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT+2>
>>
>> 0x8007e0a <SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT+2> ldr r0, [pc, #8]
>> ; (0x8007e14 <SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT+12>)
>> (gdb) i registers r0
>> r0 0x20001dc0 536878528 // the address 1dc0 seems
>> reasonable. Location of currenttm+rtleventcreate?
>>
>> 0x8007e0c <SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT+4> ldr r0, [r0, #0]
>> (gdb) i registers r0
>> r0 0x0 0
>>
>> 0x8007e0e <SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT+6> blx r0
>>
>> For the last instruction r0 is nil. This causes the default interrupt
>> handler to be called which loops forever.
>>
>> backtrace is:
>> (gdb) bt
>> #0 0x08007e0e in SYSTEM_$$_RTLEVENTCREATE$$PRTLEVENT ()
>> #1 0x0800ce5e in CLASSES_$$_COMMONINIT ()
>> #2 0x08012886 in CLASSES_$$_init ()
>> #3 0x08007a5c in fpc_initializeunits ()
>> #4 0x08000294 in main () at blinky.lpr:48
>>
>> I compiled the crosscompiler with:
>> make clean buildbase CROSSINSTALL=1 CROSSOPT="-XParm-none-eabi-"
>> OS_TARGET=embedded CPU_TARGET=arm SUBARCH=armv7em
>>
>> the program is compiled with
>> -Oparmv7em
>> -WpSTM32F407VG
>>
>> I'm guessing there is some define I have to use and everything will
>> start working :)
>>
>> Where do I go from here?
>>
>> Thanks in advance,
>>
>> Andrew Haines
>>
>>
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