[fpc-devel] DIFF patch for changing to table driven processor definitions for ARM
David Welch
dwelch at dwelch.com
Fri Aug 26 23:09:04 CEST 2011
Another diff to be considered.
Index: rtl/embedded/arm/arm_bare_ram.pp
===================================================================
--- rtl/embedded/arm/arm_bare_ram.pp (revision 0)
+++ rtl/embedded/arm/arm_bare_ram.pp (revision 0)
@@ -0,0 +1,63 @@
+{
+Startup code for a simple ram-only ARM
+David Welch 2011 08 26 (dwelch at dwelch com)
+based on lpc21x4 created by Sten Larsson (sten_larsson at yahoo com)
+}
+
+unit arm_bare_ram;
+
+{$goto on}
+
+ interface
+
+ implementation
+
+ procedure PASCALMAIN; external name 'PASCALMAIN';
+
+ procedure _FPC_haltproc; assembler; nostackframe; public name '_haltproc';
+ asm
+ .Lhalt:
+ b .Lhalt
+ end;
+
+ var
+ _stack_top: record end; external name '_stack_top';
+ _bss_start: record end; external name '_bss_start';
+ _bss_end: record end; external name '_bss_end';
+
+ procedure _FPC_start; assembler; nostackframe;
+ label
+ _start;
+ asm
+ .init
+ .align 16
+ .globl _start
+ _start:
+ ldr sp,.L_stack_top
+ // clear onboard ram
+ ldr r1,.L_bss_start
+ ldr r2,.L_bss_end
+ mov r0,#0
+.Lzeroloop:
+ cmp r1,r2
+ strls r0,[r1],#4
+ bls .Lzeroloop
+
+ bl PASCALMAIN
+ bl _FPC_haltproc
+ .L_hang:
+ b .L_hang
+.L_bss_start:
+ .long _bss_start
+.L_bss_end:
+ .long _bss_end
+
+
+
+.L_stack_top:
+ .long _stack_top
+ .text
+ end;
+
+end.
+
Index: rtl/embedded/Makefile.fpc
===================================================================
--- rtl/embedded/Makefile.fpc (revision 18855)
+++ rtl/embedded/Makefile.fpc (working copy)
@@ -53,7 +53,7 @@
endif
ifeq ($(SUBARCH),armv7)
-CPU_UNITS=lpc21x4 at91sam7x256
+CPU_UNITS=lpc21x4 at91sam7x256 arm_bare_ram
endif
endif
Index: rtl/embedded/Makefile
===================================================================
--- rtl/embedded/Makefile (revision 18855)
+++ rtl/embedded/Makefile (working copy)
@@ -317,8 +317,8 @@
ifeq ($(SUBARCH),cortexm3)
CPU_UNITS=lm3fury lm3tempest thumb2_bare stm32f103
endif
-ifeq ($(SUBARCH),armv7)
-CPU_UNITS=lpc21x4 at91sam7x256
+ifeq ($(SUBARCH),armv4)
+CPU_UNITS=lpc21x4 at91sam7x256 arm_bare_ram
endif
endif
ifeq ($(ARCH),avr)
Index: compiler/arm/cpuinfo.pas
===================================================================
--- compiler/arm/cpuinfo.pas (revision 18855)
+++ compiler/arm/cpuinfo.pas (working copy)
@@ -61,6 +61,8 @@
tcontrollertype =
(ct_none,
+ ct_arm_bare_ram,
+
{ Phillips }
ct_lpc2114,
ct_lpc2124,
@@ -212,7 +214,19 @@
sramsize:0
),
+
(
+ controllertypestr:'ARM_BARE_RAM';
+ controllerunitstr:'ARM_BARE_RAM';
+ interruptvectors:8;
+ flashbase:$00000000;
+ flashsize:$00000000;
+ srambase:$D6000000;
+ sramsize:$0000C000
+ ),
+
+
+ (
controllertypestr:'LPC2114';
controllerunitstr:'LPC21x4';
interruptvectors:8;
Index: compiler/systems/t_embed.pas
===================================================================
--- compiler/systems/t_embed.pas (revision 18855)
+++ compiler/systems/t_embed.pas (working copy)
@@ -220,6 +220,7 @@
ct_none:
begin
end;
+ ct_arm_bare_ram,
ct_lpc2114,
ct_lpc2124,
ct_lpc2194,
@@ -312,16 +313,19 @@
Add('MEMORY');
Add('{');
- LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8)
- + ', LENGTH = ' + IntToStr(flashsize div 1024)+'K';
- Add(LinkStr);
+ if(flashsize<>0) then
+ begin
+ LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8)
+ + ', LENGTH = ' + IntToStr(flashsize div 1024)+'K';
+ Add(LinkStr);
+ end;
LinkStr := ' ram : ORIGIN = 0x' + IntToHex(srambase,8)
+ ', LENGTH = ' + IntToStr(sramsize div 1024)+'K';
Add(LinkStr);
Add('}');
- Add('_stack_top = 0x' + IntToHex(sramsize+srambase-4,8) + ';');
+ Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';');
end;
end
else
@@ -329,6 +333,8 @@
internalerror(200902011);
end;
+
+ with embedded_controllers[current_settings.controllertype] do
with linkres do
begin
Add('SECTIONS');
@@ -341,14 +347,28 @@
Add(' *(.rodata, .rodata.*)');
Add(' *(.comment)');
Add(' _etext = .;');
- Add(' } >flash');
+ if(flashsize<>0) then
+ begin
+ Add(' } >flash');
+ end
+ else
+ begin
+ Add(' } >ram');
+ end;
Add(' .data :');
Add(' {');
Add(' _data = .;');
Add(' *(.data, .data.*)');
Add(' KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
Add(' _edata = .;');
- Add(' } >ram AT >flash');
+ if(flashsize<>0) then
+ begin
+ Add(' } >ram AT >flash');
+ end
+ else
+ begin
+ Add(' } >ram');
+ end;
Add(' .bss :');
Add(' {');
Add(' _bss_start = .;');
@@ -360,6 +380,7 @@
Add('}');
Add('_end = .;');
end;
+
{$endif ARM}
{$ifdef i386}
On Fri, Aug 26, 2011 at 10:53 AM, David Welch <dwelch at dwelch.com> wrote:
> need to apply this patch, like the wiki thing maybe there is a place I
> have to sign up to be able to check in to svn, otherwise. The lpc and
> sam7 parts are ARM7TDMI which is an armv4t not remotely able to
> support the armv7 instructions. the correction also needs to be made
> to allow armv7m or cortexm3. If we are going to mix the architecture
> (armv7m) and marketings name for the core (cortexm3) we should be
> consistent and start doing things like provide an arm7tdmi for the
> other two families. LIkewise anywhere it says if cortexm3 it should
> say if cortexm3 or armv7m then. if armv4 or if armv4t or if arm7tdmi
> then... Ideally not use the name cortexm3 and instead only use
> armv7m. Have a wiki page or readme that says if stellaris or stm32 or
> lpc1xxx then armv7m if lpc2xxx or sam7 or generic arm then armv4...
>
>
> Index: rtl/embedded/Makefile
> ===================================================================
> --- rtl/embedded/Makefile (revision 18854)
> +++ rtl/embedded/Makefile (working copy)
> @@ -317,7 +317,7 @@
> ifeq ($(SUBARCH),cortexm3)
> CPU_UNITS=lm3fury lm3tempest thumb2_bare stm32f103
> endif
> -ifeq ($(SUBARCH),armv7)
> +ifeq ($(SUBARCH),armv4)
> CPU_UNITS=lpc21x4 at91sam7x256
> endif
> endif
>
>
> On Fri, Aug 26, 2011 at 5:17 AM, John Clymer <john at johnclymer.net> wrote:
>> Part of what I submitted was 2 batch files in the root directory -
>> buildarm.bat and buildthumb2.bat - that was my attempt to provide an example
>> with the BINUTILS equates spelled out.
>>
>> John
>>
>>
>> ________________________________
>> From: David Welch <dwelch at dwelch.com>
>> To: FPC developers' list <fpc-devel at lists.freepascal.org>
>> Sent: Fri, August 26, 2011 6:17:43 AM
>> Subject: Re: [fpc-devel] DIFF patch for changing to table driven processor
>> definitions for ARM
>>
>>
>> Can someone with the power to update the wiki (maybe we all do I dont know)
>> change the target embedded page to reflect the SUBARCH thing?
>>
>> Also either put a link to
>>
>> http://wiki.lazarus.freepascal.org/Binutils
>>
>> or spell out something like this:
>>
>> ./configure --target=arm-linux --prefix=/something/something/
>> --program-prefix=arm-embedded- --disable-werror
>>
>> For the non-windows folks so we can play too. Too me a while to figure out
>> why I was not even able to build per the target embedded instructions.
>>
>> Thanks,
>> David
>>
>> On 08/25/2011 10:13 PM, David Welch wrote:
>>> cpuinfo.pas(156,2) Fatal: Can't open include file "controllerunit.inc"
>>>
>>> On 08/25/2011 05:50 PM, Florian Klämpfl wrote:
>>>> OS_TARGET=embedded CPU_TARGET=arm SUBARCH=cortexm3
>>
>> _______________________________________________
>> fpc-devel maillist - fpc-devel at lists.freepascal.org
>> http://lists.freepascal.org/mailman/listinfo/fpc-devel
>>
>> _______________________________________________
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>> http://lists.freepascal.org/mailman/listinfo/fpc-devel
>>
>>
>
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