[fpc-devel] DIFF patch for changing to table driven processor definitions for ARM

[John Clymer]

Attached is the re-vamped patch to add controller tables to AVR and ARM 
support.  The compiler tree that this patch was grabbed from was tested in the 
embedded target with 3 CortexM3 devices, and 1 ARM7TDMI device (in native ARM 
mode.)  [LM3S8962, LM3S2111, STM32F103RB and AT91SAM7S256] The program generated 
was a blinking LED program on 4 development boards.

Synopsis of changes:

1) rtl/embedded/arm - added files for lm3fury, lm3tempest [same file for now] 
AND thumb2bare.

2) compiler/<ARCH>/cpuinfo for ARM and AVR - include a common controllerunit 
definition from an include file

3) compiler/avr/cpuinfo for AVR - made changes to accommodate the new structure 
- and nothing more
    - tested compiler against svn checkout - both broke at same spot in 
compilation

4) compiler/arm/cpuinfo for ARM - changed to records vice arrays for cpu info.  
Added support for STM32F103RB, and a whole slew of Stellaris parts (not all, but 
quite a few)

5) compiler/system/t_embed.pas - removed static coded linker scripts on a per 
controller basis - switched to a master linker script that uses size information 
from controller table to generate linker information.

6) pmodules, globals, ncgutils, options files - changes to accommodate the 
switch to a record

7) added in root directory, sample buildarm.bat and buildthumb2.bat batch files 
- to show necessary command line options to build a compiler  (obviously, site 
requirements will change directories - but I think this will prove useful.)

NOTE:  The thumb2_bare target - this is a bare bones, no frills thumb2 target.  
The generated vector table comprises ONLY the core processor faults.  There is a 
2K static array that gets used as the stack.

If there are no major objections or blatant errors I've missed, could someone 
post this to the repository - or give me some directions to do so.

Thanks,

John
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