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<div class="moz-cite-prefix">I have boiled down my problem to this
democode. The problem is in the begin line of set Direction. The
sp gets moved to 0x0fff8f94 which is unititialized Space before
RAM.<br>
<br>
The Reason is that the offset for the local var .Lj9 (.long
-32840) is plain wrong. It might be me doing something strange
(Setting the record to absolute) but this works fine on armv7m.<br>
<br>
Jeppe, could you perhaps have a look, I compared with armv7m code
and there the whole handling of local vars seems to work totally
different. <br>
<br>
I am doing something unusual here, so another conclusion is that
my problem is most likely not related to the segfault described,
sorry for messing this thread up.<br>
<br>
Michael <br>
<br>
program hello;<br>
{$mode objfpc}<br>
{$modeswitch advancedrecords}<br>
<br>
type<br>
TGPIO_Bit = 0..11;<br>
TGPIO_Direction = (GPIO_Input, GPIO_Output);<br>
type<br>
TGPIO_Registers = record<br>
MASKED_ACCESS: array [0 .. 4095] of longword;<br>
RESERVED1 : array [0 .. 4095] of longword;<br>
DIR : longword;<br>
&IS : longword;<br>
IBE : longword;<br>
IEV : longword;<br>
IE : longword;<br>
RIS : longword;<br>
MIS : longword;<br>
IC : longword;<br>
procedure setDirection(bit : TGPIO_Bit; direction :
TGPIO_Direction);<br>
end;<br>
<br>
const<br>
LPC_AHB_BASE = $50000000;<br>
LPC_GPIO0_BASE = (LPC_AHB_BASE + $00000);<br>
<br>
var<br>
GPIO0 : TGPIO_Registers absolute(LPC_GPIO0_BASE);<br>
<br>
procedure TGPIO_Registers.setDirection(bit : TGPIO_Bit; direction
: TGPIO_Direction);<br>
begin<br>
DIR := DIR and (not (1 shl bit)) or (longWord(direction) shl
bit);<br>
end;<br>
<br>
var<br>
i : integer;<br>
begin<br>
i := 0;<br>
GPIO0.setDirection(i,GPIO_Output);<br>
end.<br>
<br>
<br>
Am 13.01.14 15:39, schrieb Michael Ring:<br>
</div>
<blockquote cite="mid:52D3FA8A.9040105@michael-ring.org" type="cite">
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<div class="moz-cite-prefix">I guess not, when I remember
correctly this has already been repaired for armv6m. The problem
for me is that .Lj9 is defined as a negative number. As a
consequence r13 points to nirvana and <br>
<br>
str r0,[r13, #8] creates an Exception.<br>
<br>
<br>
# [87] begin<br>
push {r4,r14}<br>
ldr r4,.Lj9<br>
add r13,r13,r4<br>
# Var bit located at r13+0<br>
# Var direction located at r13+4<br>
# Var $self located at r13+8<br>
str r0,[r13, #8]<br>
strb r1,[r13]<br>
str r2,[r13, #4]<br>
.Ll2:<br>
<br>
.....<br>
<br>
.Lj9:<br>
.long -32840<br>
.Lj7:<br>
.long 32768<br>
.Lj10:<br>
.long 32840<br>
.Lt2:<br>
<br>
Am 13.01.14 15:15, schrieb Jeppe Græsdal Johansen:<br>
</div>
<blockquote cite="mid:20140113142500.0910543B3@freepascal.dfmk.hu"
type="cite">Might be related to the mla/mls optimization which
somehow has been enabled even though it's still broken<br>
<br>
----- Reply message -----<br>
Fra: "Reinier Olislagers" <a moz-do-not-send="true"
class="moz-txt-link-rfc2396E"
href="mailto:reinierolislagers@gmail.com"><reinierolislagers@gmail.com></a><br>
Dato: man., jan. 13, 2014 13:44<br>
Emne: [fpc-pascal] ARM Linux crosscompiler: compiles but...
executable gives segmentation fault<br>
Til: <a moz-do-not-send="true" class="moz-txt-link-rfc2396E"
href="mailto:fpc-pascal@lists.freepascal.org"><fpc-pascal@lists.freepascal.org></a><br>
<br>
On 13/01/2014 12:34, Michael Ring wrote:<br>
> I had a look at armv6m yesterday evening, parts of my code
run fine in<br>
> gdb, the code crashes in the init of a procedure when
trying to prepare<br>
> the access to contents of a set.<br>
> The address of the set seems to get calculated totally
wrong ending up<br>
> in a memory access at the end of the chip's address range.<br>
> Not sure if this is related to your problem, I will try to
boil down the<br>
> example to a bare minimum to see where the generated code
differs<br>
> between armv7m and armv6m.<br>
<br>
Thanks a lot, Michael!<br>
<br>
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