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<p>Thank you for the report.</p>
<p>According to Agner Fog's table, complex LEA instructions should
have a 3-cycle latency on that architecture (Haswell).
Optimisations with this instruction are proving interesting
because there's such a variety between processor architectures.
There are some that are fine with 3 components, but slows right
down if a scale factor is used.</p>
<p>Kit<br>
</p>
<div class="moz-cite-prefix">On 09/10/2023 14:06, Nataraj S Narayan
via fpc-devel wrote:<br>
</div>
<blockquote type="cite"
cite="mid:CAK8HZO+FnTEpvU01rhp_osSP8bdxZ7p_DtQGmizCpasuoSV7Ug@mail.gmail.com">
<meta http-equiv="content-type" content="text/html; charset=UTF-8">
<div dir="ltr">
<div>Hi Gareth</div>
<div><br>
</div>
<div>model name : Intel(R) Core(TM) i5-4200U CPU @ 1.60GHz</div>
<div>
<div dir="ltr" class="gmail_signature"
data-smartmail="gmail_signature">
<div dir="ltr">
<div>
<div dir="ltr">
<div>
<div dir="ltr"><br>
</div>
<div>Regards</div>
<div><br>
</div>
<div dir="ltr">Nataraj S Narayan
<div>Synergy Info Systems</div>
<div>Software & Technology Consultants</div>
<div>Ettumanoor, INDIA</div>
<div>Ph:+91 9443211326</div>
</div>
</div>
</div>
</div>
</div>
</div>
</div>
<br>
</div>
<br>
<div class="gmail_quote">
<div dir="ltr" class="gmail_attr">On Sun, Oct 8, 2023 at 6:40 PM
J. Gareth Moreton via fpc-devel <<a
href="mailto:fpc-devel@lists.freepascal.org"
moz-do-not-send="true" class="moz-txt-link-freetext">fpc-devel@lists.freepascal.org</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px 0px
0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
<div>
<p>Hi Nataraj<br>
</p>
<p>Which processor is that run on? (although too close to
call, it implies LEA has a latency of 2 in that case)<br>
</p>
<p>Kit<br>
</p>
<div>On 08/10/2023 14:06, Nataraj S Narayan via fpc-devel
wrote:<br>
</div>
<blockquote type="cite">
<div dir="ltr">
<div>Hi</div>
<div><br>
</div>
<div>[nataraj@dflyHP ~]$ fpc ttt.pas</div>
Free Pascal Compiler version 3.2.2 [2023/07/04] for
x86_64<br>
Copyright (c) 1993-2021 by Florian Klaempfl and others<br>
Target OS: DragonFly for x86-64<br>
Compiling ttt.pas<br>
Linking ttt<br>
/usr/local/bin/ld.bfd: warning:
/usr/local/lib/fpc/3.2.2/units/x86_64-dragonfly/rtl/prt0.o:
missing .note.GNU-stack section implies executable stack<br>
/usr/local/bin/ld.bfd: NOTE: This behaviour is
deprecated and will be removed in a future version of
the linker<br>
121 lines compiled, 14.9 sec<br>
[nataraj@dflyHP ~]$ ./ttt <br>
Pascal control case: 6.7 ns/call<br>
Using LEA instruction: 4.2 ns/call<br>
Using ADD instructions: 4.0 ns/call<br>
<div>
<div dir="ltr" class="gmail_signature">
<div dir="ltr">
<div>
<div dir="ltr">
<div>
<div dir="ltr"><br>
</div>
<div dir="ltr"><br>
</div>
<div dir="ltr">Nataraj S Narayan
<div>Synergy Info Systems</div>
<div>Software & Technology Consultants</div>
<div>Ettumanoor, INDIA</div>
<div>Ph:+91 9443211326</div>
</div>
</div>
</div>
</div>
</div>
</div>
</div>
<br>
</div>
<br>
<div class="gmail_quote">
<div dir="ltr" class="gmail_attr">On Sat, Oct 7, 2023 at
9:39 PM J. Gareth Moreton via fpc-devel <<a
href="mailto:fpc-devel@lists.freepascal.org"
target="_blank" moz-do-not-send="true"
class="moz-txt-link-freetext">fpc-devel@lists.freepascal.org</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0px 0px
0px 0.8ex;border-left:1px solid
rgb(204,204,204);padding-left:1ex">That's interesting;
I am interested to see the assembly output for the <br>
Pascal control cases. As for the 64-bit version, that
was my fault <br>
since the assembly language is for Microsoft's ABI
rather than the <br>
System V ABI, so it was checking a register with an
undefined value. <br>
Find attached the fixed test.<br>
<br>
Kit<br>
<br>
P.S. Results on my Intel(R) Core(TM) i7-10750H<br>
<br>
Pascal control case: 2.0 ns/call<br>
Using LEA instruction: 1.7 ns/call<br>
Using ADD instructions: 1.3 ns/call<br>
<br>
On 07/10/2023 16:51, Tomas Hajny via fpc-devel wrote:<br>
> On 2023-10-07 03:57, J. Gareth Moreton via
fpc-devel wrote:<br>
><br>
><br>
> Hi Kit,<br>
><br>
>> Do you think this should suffice? Originally
it ran for 1,000,000<br>
>> repetitions but I fear that will take way too
long on a 486, so I<br>
>> reduced it to 10,000.<br>
><br>
> OK, I tried it now. First of all, after turning
on the old machine, I <br>
> realized that it wasn't Intel but AMD 486 DX4 -
sorry for my bad <br>
> memory. :-( I compiled and ran the test under
OS/2 there (I was too <br>
> lazy to boot it to DOS ;-) ), but I assume that
it shouldn't make any <br>
> substantial difference. The ADD and LEA results
were basically the <br>
> same there, both around 100 ns / call. The Pascal
result was around <br>
> twice as long. Interestingly, the Pascal result
for FPC 3.2.2 was <br>
> around 10% longer than the same source compiled
with FPC 2.0.3 (the <br>
> assembler versions were obviously the same for
both FPC versions; I <br>
> tried compiling it also with FPC 1.0.10 and the
assembler versions <br>
> were more than three times slower due to missing
support for the <br>
> nostackframe directive).<br>
><br>
> I tested it under the AMD Athlon 1 GHz machine as
well and again, the <br>
> results for LEA and ADD are basically equal (both
3.1 ns/call) and the <br>
> result for Pascal slightly more than twice (7.3
ns/call). However, <br>
> rather surprisingly for me, the overall test run
was _much_ longer <br>
> there?! Finally, I tried compiling the test on a
64-bit machine (AMD <br>
> A9-9425) with Linux (compiled for 64-bits with
FPC 3.2.3 compiled from <br>
> a fresh 3.2 branch). The Pascal version shows
about 4 ns/call, but the <br>
> assembler version runs forever - well, certainly
much longer than my <br>
> patience lasts. I haven't tried to analyze the
reasons, but that's <br>
> what I get.<br>
><br>
> Tomas<br>
><br>
><br>
><br>
>><br>
>> On 03/10/2023 06:30, Tomas Hajny via
fpc-devel wrote:<br>
>>> On October 3, 2023 03:32:34 +0200, "J.
Gareth Moreton via fpc-devel" <br>
>>> <<a
href="mailto:fpc-devel@lists.freepascal.org"
target="_blank" moz-do-not-send="true"
class="moz-txt-link-freetext">fpc-devel@lists.freepascal.org</a>>
wrote:<br>
>>><br>
>>><br>
>>> Hii Kit,<br>
>>><br>
>>>> This is mainly to Florian, but also
to anyone else who can answer <br>
>>>> the question - at which point did a
complex LEA instruction (using <br>
>>>> all three input operands and some
other specific circumstances) get <br>
>>>> slow? Preliminary research suggests
the 486 was when it gained <br>
>>>> extra latency, and then Sandy Bridge
when it got particularly bad. <br>
>>>> Icy Lake seems to be the architecture
where faster LEA instructions <br>
>>>> are reintroduced, but I'm not sure
about AMD processors.<br>
>>> I cannot answer your question, but if you
prepare a test program, I <br>
>>> can run it on an Intel 486 DX2 100 Mhz
and AMD Athlon 1 GHz machines <br>
>>> if it helps you in any way (at least I
hope the 486 DX2 machine <br>
>>> should be still able to start ;-) ).<br>
>>><br>
>>> Tomas<br>
>>><br>
>>>
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