<div dir="ltr"><div dir="ltr"><br></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, Oct 4, 2022 at 7:29 AM Travis Siegel <<a href="mailto:tsiegel@softcon.com">tsiegel@softcon.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
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<p>On 10/4/2022 1:07 AM, Christo Crause
wrote:<br></p>
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<div><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Tue, 4 Oct 2022, 01:15
Travis Siegel via fpc-devel, <<a href="mailto:fpc-devel@lists.freepascal.org" target="_blank">fpc-devel@lists.freepascal.org</a>>
wrote:<br>
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<blockquote class="gmail_quote">Does this process use gcc to
do the compile, instead of fpc directly? If <br>
it does, I will dig into making it compatible with
Parallax's line of <br>
propeller boards, since it now supports GCC to generate
code for the <br>
propeller 1 and 2 boards. Being able to program these in
pascal would <br>
be wonderful. Parallax has a series of SBC products,
including the <br>
basic stamp, a java stamp, (no longer produced), and as
mentioned, the <br>
propeller boards. They also have several robot packages
that can be <br>
programmed via the propeller or basic stamps, so if the
esp board code <br>
does work, and it calls gcc for it's work, I'll certainly
be interested <br>
in tackling making it work with the propeller boards, I
think that could <br>
help some folks start using those boards.<br>
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<div dir="auto">The compiler typically generates target CPU
specific assembler code, which requires an external assembler
and linker to generate the executable code. I don't know much
about the Parallax controllers, but it appears to be a
distinct architecture (not ARM or MIPS for example) not yet
supported by FPC, so would require a new compiler backend
AFAIU. <br>
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<p>Yeah, it's a custom board, but it has 8 cores, which makes
multitasking real simple. They call them cogs, and you can spin
up another cog at any time. It also uses a language called spin
(their version of assembly), so I guess it could be supported, but
how much work is adding a whole new architecture to FPC? </p></div></blockquote><div><br></div><div>For someone who is familiar with the compiler design, adding a new architecture would be easy but would probably still take a few weeks worth of effort. This assumes existing knowledge of the low level functioning of the target. I have patched a few bugs in the past, but it took me many days to figure out how seemingly simple functionality integrated into the overall compiler design. It would probably be worthwhile to get a compiler developer interested in this exercise from the start to help speed up the effort.</div></div></div>