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<p>After a little more fun in the debugger I came up with the
following patch:</p>
<p>Index: generic.inc<br>
===================================================================<br>
--- generic.inc (revision 40381)<br>
+++ generic.inc (working copy)<br>
@@ -77,6 +77,8 @@<br>
begin<br>
{ Align on native pointer size }<br>
aligncount:=(PtrUInt(pdest) and (sizeof(PtrUInt)-1));<br>
+ if aligncount > 0 then<br>
+ aligncount := sizeof(PtrUInt)-aligncount;<br>
dec(count,aligncount);<br>
pend:=psrc+aligncount;<br>
while psrc<pend do</p>
<p><br>
</p>
<p>from my point of view the routine is wrongly calculating the
numbers of bytes that need to be read byte aligned before a
pointer-sized copy can be done</p>
<p>Michael</p>
<p><br>
</p>
<div class="moz-cite-prefix">Am 28.11.18 um 19:51 schrieb Michael
Ring:<br>
</div>
<blockquote type="cite"
cite="mid:ba0d3661-8ed1-e877-aacc-ceab23ce4911@michael-ring.org">
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<p>The more I dig the more I ask myself if not the rtl routine is
to blame for the issue in the first place because it only takes
alignment of the destination into account when doing it's job.</p>
<p>Aligncount is calculated base on destination (which is RAM),
for this reason the last line always crashes because psrc can be
unaligned.</p>
<p>I most likely completely misunderstand the meaning of
FPC_REQUIRES_PROPER_ALIGNMENT but usually ram can be written
byte aligned but flash has often limitations on read access so
alignment should look for psrc as this can come from flash. <br>
</p>
<p>Unless of course FPC_REQUIRES_PROPER_ALIGNMENT is primarily
meant for speed improovement only, then it would make sense to
look at pdest to try to optimize write performance by having as
much aligned access as possible.I only found an old discussion
in lazarus list from 2011 on this topic, where it looks like
structs were manually aligned in lazarus, but I did not look too
deep into the patches.<br>
</p>
<p>procedure Move(const source;var dest;count:SizeInt);[public,
alias: 'FPC_MOVE']; from generic.inc line77: <br>
</p>
<p> begin<br>
{ Align on native pointer size }<br>
--> <b>aligncount:=(PtrUInt(pdest) and
(sizeof(PtrUInt)-1));</b><br>
dec(count,aligncount);<br>
pend:=psrc+aligncount;<br>
while psrc<pend do<br>
begin<br>
pdest^:=psrc^;<br>
inc(pdest);<br>
inc(psrc);<br>
end;<br>
{ use sizeuint typecast to force shr optimization }<br>
pptruint(pend):=pptruint(psrc)+(sizeuint(count) div
sizeof(ptruint));<br>
while psrc<pend do<br>
begin<br>
pptruint(pdest)^:=pptruint(psrc)^;<br>
<br>
</p>
<div class="moz-cite-prefix">Am 28.11.18 um 17:49 schrieb Michael
Ring:<br>
</div>
<blockquote type="cite"
cite="mid:dbacdcac-6122-a87e-800a-1973a5eb18a8@michael-ring.org">Hi,
<br>
<br>
I am debugging an issue that I see on mipsel embedded target
(and perhaps also on arm-embedded for corteX-m0, I had crashes
in the same rtl routine a while ago) <br>
<br>
because RAM is small on embedded devices I use: <br>
<br>
{$WRITEABLECONST OFF} <br>
<br>
which means that const are read from flash and not from ram. <br>
<br>
problem is now that const strings are sometimes not 32-bit
aligned and this causes an unaligned access exception on pic32mx
because date from flash must be read 32-bit aligned. <br>
<br>
I thought that I had seen the correct place to configure this
alignment in the past but my google/grep foo is weak at the
moment, I cannot find something in the fpc sourcecode that rings
a bell. <br>
<br>
{$CODEALIGN CONSTMIN=4} <br>
<br>
also does not work, I recompiled and in my case the const is
still improperly alligned. <br>
<br>
<br>
Thanks in advance, <br>
<br>
<br>
Michael <br>
<br>
<br>
<br>
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</blockquote>
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