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Hi,<br>
<br>
i am working on the AVX-support for the fp-compiler.<br>
<br>
Some AVX-assembler instructions have 4 operant e.g. <br>
<br>
<br>
VBLENDVPD xmm1, xmm2, xmm3/m128, xmm4<br>
<br>
<br>
<br>
INTEL Def.<br>
<br>
3.1.1.2 Opcode Column in the Instruction Summary Table (Instructions<br>
with VEX prefix)<br>
<br>
/is4: An 8-bit immediate byte is present containing a source
register specifier in<br>
imm[7:4] and instruction-specific payload in imm[3:0].<br>
<br>
<br>
<br>
I need a idea, how can i encode (in file x86ins.dat) the 4th
operant.<br>
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<span id="result_box" class="" lang="en"><span class="hps"></span><span
class="hps"><br>
My idea:<br>
<br>
new flag \77 =>> 4th operand is coded in bit 4-7 and
the follow byte define the bits 0-3<br>
e.g.<br>
<br>
[</span></span>VBLENDVPD<span id="result_box" class=""
lang="en"><span class="hps">]<br>
(Ch_All, Ch_None, Ch_None)<br>
xmmreg,xmmreg,xmmrm,xmmreg
\361\362\372\1\x4B\75\120\77\x00
AVX,SANDYBRIDGE<br>
<br>
\ 361 = prefix 066h for SSE instruction<br>
\ 362 = new flag VEX (starting with 0xC5 or 0xC4)<br>
\ 372 = new flag VEX-CODE include prefix 0x0F3A<br>
\ 75 = VEX-BYTE contains operand no. 2 <br>
\ 120 = operands 1 and 3 encoded in MODRM-Byte<br>
\ 77 = </span></span><span id="result_box" class=""
lang="en"><span class="hps"> immediate byte (b</span></span><span
id="result_box" class="" lang="en"><span class="hps">it 4-7)
contains 4th operand<br>
\ 00 = </span></span><span id="result_box" class=""
lang="en"><span class="hps"> immediate byte (b</span></span><span
id="result_box" class="" lang="en"><span class="hps">it 0-3) =
0 <br>
<br>
</span></span></div>
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<br>
i look forward to comments.<br>
<br>
<br>
regards<br>
<br>
<br>
Torsten Grundke<br>
<br>
<br>
<br>
<br>
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