Index: rtl/embedded/arm/lpc1768.pp =================================================================== --- rtl/embedded/arm/lpc1768.pp (revision 0) +++ rtl/embedded/arm/lpc1768.pp (revision 0) @@ -0,0 +1,160 @@ + +unit lpc1768; + +{$goto on} +{$define lpc1768} + +interface + +var + STCTRL : DWord absolute $E000E010; + STRELOAD : DWord absolute $E000E014; + STCURR : DWord absolute $E000E018; + + FIO1DIR2 : Byte absolute $2009C022; + FIO1SET2 : Byte absolute $2009C03A; + FIO1CLR2 : Byte absolute $2009C03E; + + SCS : DWord absolute $400FC1A0; + CLKSRCSEL: DWord absolute $400FC10C; + PLL0FEED : DWord absolute $400FC08C; + PLL0CON : DWord absolute $400FC080; + PLL0CFG : DWord absolute $400FC084; + PLL0STAT : DWord absolute $400FC088; + CCLKCFG : DWord absolute $400FC104; + +implementation + +var + _data: record end; external name '_data'; + _edata: record end; external name '_edata'; + _etext: record end; external name '_etext'; + _bss_start: record end; external name '_bss_start'; + _bss_end: record end; external name '_bss_end'; + _stack_top: record end; external name '_stack_top'; + +procedure PASCALMAIN; external name 'PASCALMAIN'; + +procedure _FPC_haltproc; assembler; nostackframe; public name '_haltproc'; +asm +.Lhalt: + b .Lhalt +end; + +procedure _FPC_start; assembler; nostackframe; +label _start; +asm + .init + .balign 16 + + .long _stack_top // stack top address + .long _start+1 // 1 Reset + .long .LDefaultHandler+1 // 2 NMI + .long .LDefaultHandler+1 // 3 HardFault + .long .LDefaultHandler+1 // 4 MemManage + .long .LDefaultHandler+1 // 5 BusFault + .long .LDefaultHandler+1 // 6 UsageFault + .long .LDefaultHandler+1 // 7 RESERVED + .long .LDefaultHandler+1 // 8 RESERVED + .long .LDefaultHandler+1 // 9 RESERVED + .long .LDefaultHandler+1 // 10 RESERVED + .long .LDefaultHandler+1 // 11 SVCall + .long .LDefaultHandler+1 // 12 Debug Monitor + .long .LDefaultHandler+1 // 13 RESERVED + .long .LDefaultHandler+1 // 14 PendSV + .long .LDefaultHandler+1 // 15 SysTick + .long .LDefaultHandler+1 // 16 External Interrupt(0) + .long .LDefaultHandler+1 // 17 External Interrupt(1) + .long .LDefaultHandler+1 // 18 External Interrupt(2) + .long .LDefaultHandler+1 // 19 ... + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + .long .LDefaultHandler+1 + + .globl _start + .text +_start: + + // Copy initialized data to ram + ldr r1,.L_etext + ldr r2,.L_data + ldr r3,.L_edata +.Lcopyloop: + cmp r2,r3 + ittt ls + ldrls r0,[r1],#4 + strls r0,[r2],#4 + bls .Lcopyloop + + // clear onboard ram + ldr r1,.L_bss_start + ldr r2,.L_bss_end + mov r0,#0 +.Lzeroloop: + cmp r1,r2 + itt ls + strls r0,[r1],#4 + bls .Lzeroloop + + b PASCALMAIN + b _FPC_haltproc + +.L_bss_start: + .long _bss_start +.L_bss_end: + .long _bss_end +.L_etext: + .long _etext +.L_data: + .long _data +.L_edata: + .long _edata +.LDefaultHandlerAddr: + .long .LDefaultHandler + // default irq handler just returns +.LDefaultHandler: + mov pc,r14 +end; + +end. + + Index: rtl/embedded/Makefile.fpc =================================================================== --- rtl/embedded/Makefile.fpc (revision 18875) +++ rtl/embedded/Makefile.fpc (working copy) @@ -49,13 +49,15 @@ ifeq ($(ARCH),arm) ifeq ($(SUBARCH),armv7m) -CPU_UNITS=lm3fury lm3tempest stm32f103 # thumb2_bare +CPU_UNITS=lm3fury lm3tempest stm32f103 lpc1768 # thumb2_bare endif - ifeq ($(SUBARCH),armv4t) CPU_UNITS=lpc21x4 at91sam7x256 endif +ifeq ($(SUBARCH),armv4) +CPU_UNITS=lpc21x4 at91sam7x256 endif +endif ifeq ($(ARCH),avr) CPU_UNITS=atmega128 Index: rtl/embedded/Makefile =================================================================== --- rtl/embedded/Makefile (revision 18875) +++ rtl/embedded/Makefile (working copy) @@ -315,12 +315,15 @@ SYSINIT_UNITS= ifeq ($(ARCH),arm) ifeq ($(SUBARCH),armv7m) -CPU_UNITS=lm3fury lm3tempest stm32f103 # thumb2_bare +CPU_UNITS=lm3fury lm3tempest stm32f103 lpc1768 # thumb2_bare endif ifeq ($(SUBARCH),armv4t) CPU_UNITS=lpc21x4 at91sam7x256 endif +ifeq ($(SUBARCH),armv4) +CPU_UNITS=lpc21x4 at91sam7x256 endif +endif ifeq ($(ARCH),avr) CPU_UNITS=atmega128 endif Index: compiler/arm/cpuinfo.pas =================================================================== --- compiler/arm/cpuinfo.pas (revision 18875) +++ compiler/arm/cpuinfo.pas (working copy) @@ -65,6 +65,7 @@ ct_lpc2114, ct_lpc2124, ct_lpc2194, + ct_lpc1768, { ATMEL } ct_at91sam7s256, @@ -243,6 +244,16 @@ ), ( + controllertypestr:'LPC1768'; + controllerunitstr:'LPC1768'; + interruptvectors:12; + flashbase:$00000000; + flashsize:$00040000; + srambase:$10000000; + sramsize:$00008000 + ), + + ( controllertypestr:'AT91SAM7S256'; controllerunitstr:'AT91SAM7x256'; interruptvectors:8; Index: compiler/systems/t_embed.pas =================================================================== --- compiler/systems/t_embed.pas (revision 18875) +++ compiler/systems/t_embed.pas (working copy) @@ -224,6 +224,7 @@ ct_lpc2114, ct_lpc2124, ct_lpc2194, + ct_lpc1768, ct_at91sam7s256, ct_at91sam7se256, ct_at91sam7x256, @@ -312,17 +313,19 @@ Add('ENTRY(_START)'); Add('MEMORY'); Add('{'); + if(flashsize<>0) then + begin + LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8) + + ', LENGTH = 0x' + IntToHex(flashsize,8); + Add(LinkStr); + end; - LinkStr := ' flash : ORIGIN = 0x' + IntToHex(flashbase,8) - + ', LENGTH = ' + IntToStr(flashsize div 1024)+'K'; - Add(LinkStr); - LinkStr := ' ram : ORIGIN = 0x' + IntToHex(srambase,8) - + ', LENGTH = ' + IntToStr(sramsize div 1024)+'K'; + + ', LENGTH = 0x' + IntToHex(sramsize,8); Add(LinkStr); Add('}'); - Add('_stack_top = 0x' + IntToHex(sramsize+srambase-4,8) + ';'); + Add('_stack_top = 0x' + IntToHex(sramsize+srambase,8) + ';'); end; end else @@ -330,6 +333,7 @@ internalerror(200902011); end; + with embedded_controllers[current_settings.controllertype] do with linkres do begin Add('SECTIONS'); @@ -342,14 +346,28 @@ Add(' *(.rodata, .rodata.*)'); Add(' *(.comment)'); Add(' _etext = .;'); - Add(' } >flash'); + if(flashsize<>0) then + begin + Add(' } >flash'); + end + else + begin + Add(' } >ram'); + end; Add(' .data :'); Add(' {'); Add(' _data = .;'); Add(' *(.data, .data.*)'); Add(' KEEP (*(.fpc .fpc.n_version .fpc.n_links))'); Add(' _edata = .;'); - Add(' } >ram AT >flash'); + if(flashsize<>0) then + begin + Add(' } >ram AT >flash'); + end + else + begin + Add(' } >ram'); + end; Add(' .bss :'); Add(' {'); Add(' _bss_start = .;');